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Add the "don't care" simulation

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* src/tgba/bddprint.cc, src/tgba/bddprint.hh: Add bdd_print_isop
that prints the bdd into a Irreductible Sum Of Product.
* src/tgbaalgos/dupexp.cc, src/tgbaalgos/dupexp.hh: Add a way to
know which states (in the input) is which (in the result).
* src/tgbaalgos/simulation.cc, src/tgbaalgos/simulation.hh: Add
the Don't Care Simulation and the Don't Care Iterated Simulation.
* src/tgbatest/ltl2tgba.cc, src/tgbatest/spotlbtt.test,
src/tgbatest/Makefile.am, src/tgbatest/sim.test: Test them.
* bench/ltl2tgba/algorithms, bench/ltl2tgba/README,
bench/ltl2tgba/algorithms: Add a way to bench the don't care
simulation.
This commit is contained in:
Thomas Badie 2012-09-27 16:45:40 +02:00 • committed by Alexandre Duret-Lutz
parent 5796114e37
commit 08c77318ae
12 changed files with 1171 additions and 76 deletions
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3
src/tgbatest/Makefile.am
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@ -69,7 +69,6 @@ tripprod_SOURCES = tripprod.cc
# because such failures will be easier to diagnose and fix.
TESTS = \
intvcomp.test \
simdet.test \
eltl2tgba.test \
explicit.test \
explicit2.test \
@ -79,6 +78,8 @@ TESTS = \
nondet.test \
neverclaimread.test \
readsave.test \
simdet.test \
sim.test \
ltl2tgba.test \
ltl2neverclaim.test \
ltl2neverclaim-lbtt.test \