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ltlsynt: replace -x minimization-lvl=N by --simplify

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* bin/ltlsynt.cc: Implement the new option, and make it default
to bisimulation with output assignment (a.k.a. bwoa).
* NEWS, bin/spot-x.cc, doc/org/ltlsynt.org: Update the documentation.
* spot/twaalgos/game.hh: Make bwoa the default.
* tests/core/ltlsynt.test: Add and adjust test cases.
* tests/python/games.ipynb: Adjust.
This commit is contained in:
Alexandre Duret-Lutz 2021-10-06 17:32:41 +02:00
parent af5474d791
commit 0ac5bbc05d
7 changed files with 1538 additions and 1529 deletions
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41
bin/ltlsynt.cc
View file

@ -51,6 +51,7 @@ enum
OPT_PRINT_AIGER,
OPT_PRINT_HOA,
OPT_REAL,
OPT_SIMPLIFY,
OPT_VERBOSE,
OPT_VERIFY
};
@ -78,7 +79,13 @@ static const argp_option options[] =
" \"lar.old\": old version of LAR, for benchmarking.\n", 0 },
{ "decompose", OPT_DECOMPOSE, "yes|no", 0,
"whether to decompose the specification as multiple output-disjoint "
"problems to solve independently (enabled by default)", 0},
"problems to solve independently (enabled by default)", 0 },
{ "simplify", OPT_SIMPLIFY, "no|bisim|bwoa|sat|bisim-sat|bwoa-sat", 0,
"simplification to apply to the controler (no) nothing, "
"(bisim) bisimulation-based reduction, (bwoa) bissimulation-based "
"reduction with output assignment, (sat) SAT-based minimization, "
"(bisim-sat) SAT after bisim, (bwoa-sat) SAT after bwoa. Defaults "
"to 'bwoa'.", 0 },
/**************************************************/
{ nullptr, 0, nullptr, 0, "Output options:", 20 },
{ "print-pg", OPT_PRINT, nullptr, 0,
@ -182,6 +189,27 @@ static bool decompose_values[] =
ARGMATCH_VERIFY(decompose_args, decompose_values);
bool opt_decompose_ltl = true;
static const char* const simplify_args[] =
{
"no", "false", "disabled", "0",
"bisim", "1",
"bwoa", "bisim-with-output-assignment", "2",
"sat", "3",
"bisim-sat", "4",
"bwoa-sat", "5",
nullptr
};
static unsigned simplify_values[] =
{
0, 0, 0, 0,
1, 1,
2, 2, 2,
3, 3,
4, 4,
5, 5,
};
ARGMATCH_VERIFY(simplify_args, simplify_values);
namespace
{
auto str_tolower = [] (std::string s)
@ -389,11 +417,12 @@ namespace
{
spot::stopwatch sw_min;
sw_min.start();
bool do_split = 3 <= gi->opt.get("minimization-level", 1);
unsigned simplify = gi->minimize_lvl;
bool do_split = 3 <= simplify;
if (do_split)
split_2step_fast_here(strat.strat_like,
spot::get_synthesis_outputs(strat.strat_like));
minimize_strategy_here(strat.strat_like, gi->minimize_lvl);
minimize_strategy_here(strat.strat_like, simplify);
if (do_split)
strat.strat_like = spot::unsplit_2step(strat.strat_like);
auto delta = sw_min.stop();
@ -619,6 +648,10 @@ parse_opt(int key, char *arg, struct argp_state *)
case OPT_REAL:
opt_real = true;
break;
case OPT_SIMPLIFY:
gi->minimize_lvl = XARGMATCH("--simplify", arg,
simplify_args, simplify_values);
break;
case OPT_VERBOSE:
gi->verbose_stream = &std::cerr;
if (not gi->bv)
@ -632,8 +665,6 @@ parse_opt(int key, char *arg, struct argp_state *)
const char* opt = gi->opt.parse_options(arg);
if (opt)
error(2, 0, "failed to parse --options near '%s'", opt);
// Dispatch the options to the gi structure
gi->minimize_lvl = gi->opt.get("minimization-level", 1);
}
break;
}

12
bin/spot-x.cc
View file

@ -237,18 +237,6 @@ sets. By default this is only enabled when options -B or -S are used.") },
"Chose which simulation based reduction to use: 1 force the \
signature-based BDD implementation, 2 force matrix-based and 0, the default, \
is a heristic wich choose which implementation to use.") },
{ nullptr, 0, nullptr, 0, "Synthesis options:", 0 },
{ DOC("minimization-level",
"Specify how AIGER circuits should be simplified. "
"(0) no simplification, "
"(1) bisimulation-based reduction, "
"(2) simplification using language inclusion and output assignments, "
"(3) exact minimization using a SAT solver, "
"(4) bisimulation-based reduction before exact minimization via "
"SAT solver, "
"(5) simplification using output assignments before exact "
"minimization via SAT solver. "
"The default value is 1.") },
{ nullptr, 0, nullptr, 0, nullptr, 0 }
};