acc: Add operators == and != for acc_code
and make sure are_isomorphic does not look only at the number of acceptance sets * src/tgba/acc.hh: Here. * src/tgbaalgos/are_isomorphic.cc: Use it to ensure two automata have the same acceptance condition. * src/tgbatest/explpro4.test: Test product between Büchi and co-Büchi, and make sure the isomorphic check look at the acceptance condition.
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3 changed files with 61 additions and 9 deletions
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@ -211,6 +211,42 @@ namespace spot
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struct acc_code: public std::vector<acc_word>
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struct acc_code: public std::vector<acc_word>
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{
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{
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bool operator==(const acc_code& other)
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{
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unsigned pos = size();
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if (other.size() != pos)
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return false;
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while (pos > 0)
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{
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auto op = (*this)[pos - 1].op;
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auto sz = (*this)[pos - 1].size;
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if (other[pos - 1].op != op ||
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other[pos - 1].size != sz)
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return false;
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switch (op)
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{
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case acc_cond::acc_op::And:
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case acc_cond::acc_op::Or:
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--pos;
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break;
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case acc_cond::acc_op::Inf:
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case acc_cond::acc_op::InfNeg:
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case acc_cond::acc_op::Fin:
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case acc_cond::acc_op::FinNeg:
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pos -= 2;
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if (other[pos].mark != (*this)[pos].mark)
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return false;
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break;
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}
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}
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return true;
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};
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bool operator!=(const acc_code& other)
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{
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return !(*this == other);
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}
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bool is_true() const
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bool is_true() const
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{
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{
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unsigned s = size();
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unsigned s = size();
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@ -1,5 +1,5 @@
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// -*- coding: utf-8 -*-
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// -*- coding: utf-8 -*-
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// Copyright (C) 2014 Laboratoire de Recherche et
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// Copyright (C) 2014, 2015 Laboratoire de Recherche et
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// Développement de l'Epita (LRDE).
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// Développement de l'Epita (LRDE).
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// Copyright (C) 2004, 2005 Laboratoire d'Informatique de Paris 6 (LIP6),
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// Copyright (C) 2004, 2005 Laboratoire d'Informatique de Paris 6 (LIP6),
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// département Systèmes Répartis Coopératifs (SRC), Université Pierre
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// département Systèmes Répartis Coopératifs (SRC), Université Pierre
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@ -102,7 +102,9 @@ namespace
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{
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{
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return aut1->num_states() != aut2->num_states() ||
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return aut1->num_states() != aut2->num_states() ||
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aut1->num_transitions() != aut2->num_transitions() ||
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aut1->num_transitions() != aut2->num_transitions() ||
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aut1->acc().num_sets() != aut2->acc().num_sets();
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// FIXME: At some point, it would be nice to support reordering
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// of acceptance sets (issue #58).
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aut1->acc().get_acceptance() != aut2->acc().get_acceptance();
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}
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}
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}
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}
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@ -1,7 +1,7 @@
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#!/bin/sh
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#!/bin/sh
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# -*- coding: utf-8 -*-
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# -*- coding: utf-8 -*-
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# Copyright (C) 2009, 2014 Laboratoire de Recherche et Développement
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# Copyright (C) 2009, 2014, 2015 Laboratoire de Recherche et
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# de l'Epita (LRDE).
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# Développement de l'Epita (LRDE).
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# Copyright (C) 2006 Laboratoire d'Informatique de Paris 6 (LIP6),
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# Copyright (C) 2006 Laboratoire d'Informatique de Paris 6 (LIP6),
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# département Systèmes Répartis Coopératifs (SRC), Université Pierre
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# département Systèmes Répartis Coopératifs (SRC), Université Pierre
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# et Marie Curie.
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# et Marie Curie.
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@ -47,7 +47,7 @@ States: 1
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Start: 0
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Start: 0
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AP: 1 "a"
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AP: 1 "a"
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acc-name: Buchi
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acc-name: Buchi
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Acceptance: 1 Inf(0)
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Acceptance: 1 Fin(0)
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properties: trans-labels explicit-labels trans-acc complete deterministic
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properties: trans-labels explicit-labels trans-acc complete deterministic
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--BODY--
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--BODY--
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State: 0
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State: 0
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@ -61,8 +61,21 @@ HOA: v1
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States: 1
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States: 1
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Start: 0
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Start: 0
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AP: 1 "a"
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AP: 1 "a"
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acc-name: generalized-Buchi 2
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Acceptance: 2 Inf(0) & Fin(1)
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Acceptance: 2 Inf(0)&Inf(1)
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properties: trans-labels explicit-labels trans-acc complete deterministic
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--BODY--
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State: 0
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[!0] 0 {1}
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[0] 0 {0}
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--END--
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EOF
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cat >unexpected <<'EOF'
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HOA: v1
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States: 1
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Start: 0
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AP: 1 "a"
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Acceptance: 2 Inf(0) & Inf(1)
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properties: trans-labels explicit-labels trans-acc complete deterministic
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properties: trans-labels explicit-labels trans-acc complete deterministic
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--BODY--
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--BODY--
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State: 0
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State: 0
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@ -72,6 +85,7 @@ State: 0
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EOF
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EOF
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run 0 ../../bin/autfilt input1 --product input2 --hoa | tee stdout
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run 0 ../../bin/autfilt input1 --product input2 --hoa | tee stdout
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run 0 ../../bin/autfilt -F stdout --isomorph expected
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run 0 ../../bin/autfilt -q stdout --isomorph expected
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run 1 ../../bin/autfilt -q stdout --isomorph unexpected
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rm input1 input2 stdout expected
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true
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