Fix slight error in aiger
The negation of global equivalences for outputs contained a slight error when the output corresponded to a negated gate. * spot/twaalgos/aiger.cc: Fix * tests/core/ltlsynt.test: Test
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2 changed files with 16 additions and 1 deletions
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@ -2061,7 +2061,10 @@ namespace
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assert(it2 != output_names_all.end());
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unsigned outnum = it2 - output_names_all.begin();
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unsigned outvar = circuit.output(outnum);
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circuit.set_output(i, outvar + neg_repr);
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assert(outvar != -1u);
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if (neg_repr)
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outvar = circuit.aig_not(outvar);
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circuit.set_output(i, outvar);
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}
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}
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}
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@ -1304,3 +1304,15 @@ f2='G(i1->(o1|!o2)) & G(!i1->(o3|!o4)) & G(i2->(!o1|o2)) & G(!i2->(!o3|o4))&Go5'
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ltlsynt -f "$f2" --polarity=before-decom --verbose 2>out 1>&2
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sed 's/ [0-9.e-]* seconds/ X seconds/g;s/ -> /->/g;' out > outx
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diff outx exp
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# Additional test for global equivalences
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# Specifically if the output is set to the negation of another output
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ltlsynt -f "((G((p0)<->(!(p1))))&&(((F(a))||(G(b)))<->(G(F(p0)))))" \
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--outs "p1, p0" \
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--verify --aiger | tail -n 1 > out
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cat > expected <<EOF
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Circuit was verified
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EOF
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diff out expected
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