acd: add support for state-based output
* spot/twaalgos/zlktree.hh, spot/twaalgos/zlktree.cc (acd::node_level, acd::state_step, acd_transform_sbacc): New public functions. * tests/python/zlktree.ipynb, tests/python/zlktree.py: More tests. * NEWS: Typo.
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NEWS
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NEWS
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@ -15,19 +15,19 @@ New in spot 2.9.8.dev (not yet released)
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- ltlsynt --aiger option now takes an optional argument indicating
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how the bdd and states are to be encoded in the aiger output.
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The option has to be given in the form
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ite|isop|both[+ud][+dc][+sub0|sub1|sub2] where the first
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The option has to be given in the form
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ite|isop|both[+ud][+dc][+sub0|sub1|sub2] where the first
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only obligatory argument decides whether "if-then-else" ("ite")
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or irreducible-sum-of-products ("isop") is to be used.
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"both" executes both strategies and retains the smaller circuits.
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The additional options are for fine-tuning. "ud" also encodes the
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The additional options are for fine-tuning. "ud" also encodes the
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dual of the conditions and retains the smaller circuits.
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"dc" computes if for some inputs we do not care whether the
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output is high or low and try to use this information to compute
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a smaller circuit. "subX" indicates different strategies to find
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common subexpressions, with "sub0" indicating no extra computations.
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- ltlsynt --verify checks the computed strategy or aiger circuit
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- ltlsynt --verify checks the computed strategy or aiger circuit
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against the specification.
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- ltlsynt -x "specification-decomposition" determines whether or not
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@ -36,8 +36,8 @@ New in spot 2.9.8.dev (not yet released)
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into a circuit.
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- ltlsynt -x "minimization-level=[0-5]" determines how to minimize
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the strategy (a monitor). 0, no minimization; 1, regular DFA
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minimization; 2, signature based minimization with
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the strategy (a monitor). 0, no minimization; 1, regular DFA
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minimization; 2, signature based minimization with
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output assignement; 3, SAT based minimization; 4, 1 then 3;
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5, 2 then 3.
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@ -58,11 +58,11 @@ New in spot 2.9.8.dev (not yet released)
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Library:
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- Spot now provides convenient function to create and solve game.
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The functions are located in twaalgos/game.hh and
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twaalgos/synthesis.hh. Moreover a new structure holding
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The functions are located in twaalgos/game.hh and
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twaalgos/synthesis.hh. Moreover a new structure holding
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all the necessary options called game_info is now available.
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- A new class called aig is introduced to represent
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- A new class called aig is introduced to represent
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and-inverter-graphs, which is useful for synthesis.
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- Historically, Spot labels automata by Boolean formulas over
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@ -275,7 +275,7 @@ New in spot 2.9.8.dev (not yet released)
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Additionally, this function now returns the number of states that
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have been merged (and therefore removed from the automaton).
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- spot::zielonka_tree and spot::acd are new class that implement the
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- spot::zielonka_tree and spot::acd are new classes that implement the
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Zielonka Tree and Alternatic Cycle Decomposition, based on a paper
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by Casares et al. (ICALP'21). Those structures can be used to
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paritize any automaton, and more. The graphical rendering of ACD
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