synthesis: fix handling of deadstates

* spot/twaalgos/synthesis.cc: Remove a debuging print
from the semisym code, and add an additional case
in the fullysym code.
* tests/core/ltlsynt.test: Add a some test case,
and remove some bashism.

spot/twaalgos/synthesis.cc

@@ -1386,6 +1386,8 @@ namespace spot
           {
             assert(std::holds_alternative<bdd>(ccondin));
             const bdd& ccond = std::get<bdd>(ccondin);
+            if (ccond == bddfalse)
+              return;
             int clvl = ccond == bddtrue ? inIdx : bdd_var(ccond);
             if (clvl >= inIdx)
               {
@@ -1468,17 +1470,11 @@ namespace spot
             for (const auto &e: aut->out(s))
               enc_out_s |= encode_edge(e);  // Switch to new ins and outs
 
-            // Can only be false if there is no outgoing edge
-            // In this case: Nothing to do
-            assert(enc_out_s != bddfalse
-                   || (!(aut->out(s).begin())));
-
             if (enc_out_s == bddfalse)
             {
-              std::cerr << "Dead end state: " << s << '\n';
-#ifndef NDEBUG
-              print_hoa(std::cerr, aut);
-#endif
+              // Can only be false if there is no outgoing edge
+              // In this case: Nothing to do
+              assert(!(aut->out(s).begin()));
               continue;
             }
 

tests/core/ltlsynt.test

@@ -494,12 +494,12 @@ diff out exp
 
 for splitt in expl semisym fullysym auto
 do
-  res=$(ltlsynt -f "G((i0 && i1)<->X(o0)) && G((i2|i3)<->X(o1))" \
+  # REALIZABLE
+  ltlsynt -f "G((i0 && i1)<->X(o0)) && G((i2|i3)<->X(o1))" \
           --outs="o0,o1" --aiger=isop+ud --algo=lar --decompose=no \
-          --simpl=no --splittype="$splitt" --realizability)
-  if [[ "$res" != "REALIZABLE" ]]; then
-    echo "Expected realizable"
-  fi
+          --simpl=no --splittype="$splitt" --realizability || exit 2
+  # UNREALIZABLE
+  ltlsynt -f "Gi & Fo" --splittype="$splitt" --realizability && exit 2
 done