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Fix slight error in aiger

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The negation of global equivalences for outputs
contained a slight error when the output corresponded
to a negated gate.

* spot/twaalgos/aiger.cc: Fix
* tests/core/ltlsynt.test: Test
This commit is contained in:
Philipp Schlehuber-Caissier 2025-01-05 13:18:35 +01:00 • committed by Alexandre Duret-Lutz
parent 461dc842e9
commit ddbe0e32b0
2 changed files with 17 additions and 1 deletions
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5
spot/twaalgos/aiger.cc
View file

@ -2061,7 +2061,10 @@ namespace
assert(it2 != output_names_all.end()); assert(it2 != output_names_all.end());
unsigned outnum = it2 - output_names_all.begin(); unsigned outnum = it2 - output_names_all.begin();
unsigned outvar = circuit.output(outnum); unsigned outvar = circuit.output(outnum);
circuit.set_output(i, outvar + neg_repr); assert(outvar != -1u);
if (neg_repr)
outvar = circuit.aig_not(outvar);
circuit.set_output(i, outvar);
} }
} }
} }

13
tests/core/ltlsynt.test
View file

@ -1360,3 +1360,16 @@ REALIZABLE
REALIZABLE REALIZABLE
EOF EOF
diff out expected diff out expected
# Additional test for global equivalences
# Specifically if the output is set to the negation of another output
ltlsynt -f "((G((p0)<->(!(p1))))&&(((F(a))||(G(b)))<->(G(F(p0)))))" \
--outs "p1, p0" \
--verify --aiger | tail -n 1 > out
cat > expected <<EOF
Circuit was verified
EOF
diff out expected