1da0afbafe
To ease debugging and testing, ltlsynt can output the synthesized strategy as an automaton, not just an aiger circuit. Also, its exit code has been changed to something meaningful. * bin/ltlsynt.cc: Various improvements: options, exit code, code style * spot/twaalgos/aiger.hh, spot/twaalgos/aiger.cc, spot/twaalgos/Makefile.am: Move the aiger printer to separate files * tests/core/ltlsynt.test: Clean up and update test file * tests/Makefile.am: Add the test file to the test suite * NEWS: document the new aiger printer * doc/org/concepts.org: document the named property "synthesis-outputs", used by print_aiger
46 lines
1.9 KiB
C++
46 lines
1.9 KiB
C++
// -*- coding: utf-8 -*-
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// Copyright (C) 2017 Laboratoire de Recherche et Développement
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// de l'Epita (LRDE).
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//
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// This file is part of Spot, a model checking library.
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//
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// Spot is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 3 of the License, or
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// (at your option) any later version.
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//
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// Spot is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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// License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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#pragma once
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#include <iosfwd>
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#include <spot/misc/common.hh>
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#include <spot/twa/fwd.hh>
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namespace spot
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{
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/// \ingroup twa_io
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/// \brief Encode and print an automaton as an AIGER circuit.
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///
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/// The circuit actually encodes the transition relation of the automaton, not
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/// its acceptance condition. Therefore, this function will reject automata
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/// whose acceptance condition is not trivial (i.e. true).
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/// States are encoded by latches (or registers) in the circuit. Atomic
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/// propositions are encoded as inputs and outputs of the circuit. To know
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/// which AP should be encoded as outputs, print_aiger() relies on the named
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/// property "synthesis-outputs", which is a bdd containing the conjunction of
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/// such output propositions. All other AP are encoded as inputs. If the named
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/// property is not set, all AP are encoded as inputs, and the circuit has no
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/// output.
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///
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/// \param os The output stream to print on.
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/// \param aut The automaton to output.
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SPOT_API std::ostream&
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print_aiger(std::ostream& os, const const_twa_ptr& aut);
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}
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