spot/tests/core/bitvect.test
Alexandre Duret-Lutz b6df1f8f92 bitvect: add a foreach_set_index(callback) function
Related to #476, where that is needed.

* spot/misc/bitvect.hh: Here.
* tests/core/bitvect.cc, tests/core/bitvect.test: Add some tests.
2021-09-11 01:00:24 +02:00

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#!/bin/sh
# -*- coding: utf-8 -*-
# Copyright (C) 2013, 2015, 2016, 2021 Laboratoire de Recherche et
# Développement de l'Epita (LRDE).
#
# This file is part of Spot, a model checking library.
#
# Spot is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# Spot is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
# License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
. ./defs
set -e
run 0 ../bitvect | sed 's/ $//' | tee stderr
cat >expected <<EOF
0_________1_________2_________3_________4_________5_________6_________7_____
0123456789012345678901234567890123456789012345678901234567890123456789012345
v: 000000000000000
v: 000000010010100
0_________1_________2_________3_________4_________5_________6_________7_____
0123456789012345678901234567890123456789012345678901234567890123456789012345
w: 000000010000010000000000000000100000000001
w: 000000000010110000000000000000100000000001
0_________1_________2_________3_________4_________5_________6_________7_____
0123456789012345678901234567890123456789012345678901234567890123456789012345
x: 000000000000000000000000000000000000000000000000000000000000100000000010000
x: 000000000010110000000000000000100000000001000000000000000000100000000010000
foreach in v: 7,10,12,
foreach in w: 10,12,13,30,41,
foreach in x: 10,12,13,30,41,60,70,
subset? 1 0
foreach in x-x:
0_________1_________2_________3_________4_________5_________6_________7_____
0123456789012345678901234567890123456789012345678901234567890123456789012345
0: 110011001100110011001100110011001100110011001100110011001100
1: 110011001100110011001100110011001100110011001100110011001100
2: 001100110011001100110011001100110011001100110011001100110011
3: 001100110011001100110011001100110011001100110011001100110011
4: 110011001100110011001100110011001100110011001100110011001100
5: 110011001100110011001100110011001100110011001100110011001100
6: 001100110011001100110011001100110011001100110011001100110011
7: 001100110011001100110011001100110011001100110011001100110011
8: 110011001100110011001100110011001100110011001100110011001100
9: 110011001100110011001100110011001100110011001100110011001100
0_________1_________2_________3_________4_________5_________6_________7_____
0123456789012345678901234567890123456789012345678901234567890123456789012345
0: 110011001100110011001100110011001100110011001100110011001100
1: 110011001100110011001100110011001100110011001100110011001100
2: 001100110011001100110011001100110011001100110011001100110011
3: 001100110011001100110011001100110011001100110011001100110011
4: 110011001100110011001100110011001100110011001100110011001100
5: 110011001100110011001100110011001100110011001100110011001100
6: 111111111111111111111111111111111111111111111111111111111111
7: 001100110011001100110011001100110011001100110011001100110011
8: 001100110011001100110011001100110011001100110011001100110011
9: 110011001100110011001100110011001100110011001100110011001100
Comp: 1011000
EOF
diff expected stderr